Contact
Hoe winkelen bij ons werkt
Bezorging
Winkelgids
Guide to Computer Processor Architecture
A RISC-V Approach, with High-Level Synthesis
Engels
147 b
Retourneren binnen 30 dagen
Klanten kochten ook
The book presents a succession of RISC-V processor implementations in increasing difficulty (non pipelined, pipelined, deeply pipelined, multithreaded, multicore).Each implementation is shown as an HLS (High Level Synthesis) code in C++ which can really be synthesized and tested on an FPGA based development board (such a board can be freely obtained from the Xilinx University Program targeting the university professors).The book can be useful for three reasons. First, it is a novel way to introduce computer architecture. The codes given can serve as labs for a processor architecture course. Second, the book content is based on the RISC-V Instruction Set Architecture, which is an open-source machine language promised to become the machine language to be taught, replacing DLX and MIPS. Third, all the designs are implemented through the High Level Synthesis, a tool which is able to translate a C program into an IP (Intellectual Property). Hence, the book can serve to engineers willing to implement processors on FPGA and to researchers willing to develop RISC-V based hardware simulators.
Informatie over het boek
Engels
Geef dit boek vandaag nog cadeau
Dat gaat heel eenvoudig
1 Voeg het boek toe aan je winkelwagentje en selecteer Als cadeau bezorgen 2 Je krijgt van ons per omgaand een voucher 3 Het boek wordt bezorgd op het adres van de ontvangerDit vind je misschien ook interessant
/
Gebonden (harde band)
147.10
€
/
Gebonden (paperback)
53.41
€
/
Gebonden (paperback)
17.19
€
/
Gebonden (paperback)
80.02
€
